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Result 1 - 9 of 9
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Multichannel Hardware Viterbi Decoder IP Implementation (Verilog)

Client: manufacturer of high-performance GNSS devices Scope: to create and implement multichannel HW Viterbi Decoder IP from the scratch to increase reception sensitivity without reducing the transmission rate Project Features: IP concept development High-level C++ model development including verification procedures Verilog implementation Completely HW-controlled (w/o processor or controller involvement) Rigid logic realization More than 180 independent channels Configurable Code Rate (1/2 or 1/3)...

Modified: 05.05.2014
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DSP High-Sensitive Tracking and Multipath Mitigation Algorithms

Client: manufacturer of high-performance GNSS devices Scope: to develop and implement DSP high-sensitive tracking and multipath mitigation algorithms to improve competitive advantages of the GPS/GLONASS/etc. receivers in a strong shadowing condition Project Features: Mitigation of multipass to improve signal quality Math algorithms for pulse gates switching Exception of secondary tracking points Discriminator curve development for better signal monitoring Quasi-optimal algorithms implementation...

Modified: 05.05.2014
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High Availability Open Signaling Architecture

Client: telecom hardware vendor Scope: The project targets the implementation of redundant primary/backup signaling subsystem under complete control of the local call processing applications. Development includes the ISUP, TUP, MTP application interfaces, which are integrated into the signaling APIs with CT Access. Product Features: The High Availability Open Signaling Architecture is a set of hardware and software components that support the development of distributed, highly available call processing...

Modified: 02.04.2014
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Voice/Fax/Call Processing System to SPARC Solaris Platform

Client: telecom hardware vendor Scope: The goal of the project is to make NMS CT Access software and several additional packages available on SPARC Solaris platform. Additional packages include Natural Fax (NFX), ISDN support, Real Time Fax (RTF), and Host Based Fusion (HBF). Product Features: CTAccess is a modular runtime and development environment for voice, fax, and call processing applications. It provides a simple and consistent standard application programming interface (API) for integrating...

Modified: 02.04.2014
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Optimizing HW Algorithms for Data Collection

Client: major military HW developer. Scope: to create testing and debugging system that measures accuracy rate of harmonic oscillations performed by the HW unit Product Functionality: SW performs a number of tests, collect and represent results and provides HW developers with low-level tools for debugging SW loads oscillation parameters into the HW module and starts it SW performs periodic requests to the HW sensors, collects data, performs coherent and non-coherent accumulation At the end of cycle...

Modified: 02.04.2014
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Signal Processing for Patient Monitor

Client: worldwide medical device manufacture Scope: to realize DSP firmware upload process and bootloader development as a part of new patient monitoring software project Product Features: Ÿ Easy to use, customizable Qt user interface Ÿ Various screen sizes 12”-15” Touch screen control Basic monitoring functions: ECG 3-6 leads, RESP, NIBP, 2X YSI TEMP, SPO2, ST analysis, Arrhythmia alarm Screens support up to 8 waveforms + several other views Several display modes: big font, full ECG, night...

Modified: 02.04.2014
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Encrypted Communication Module

Client : a large military HW developer Scope: to develop a software module that performs encryption and decryption of an information stream Tasks: Development of a hardware/software module (for Cyclone III) that generates M-sequence with variable polynomials and initial value System Functionality: NIOS II core-based system Loading of polynomial and initial value into the hardware part and M-sequence generation by setting "enable" signal high, hardware generates M-sequence while "enable"...

Modified: 02.04.2014
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Fast Start Engine IP for New ASIC (Verilog)

Client: manufacturer of high-performance GNSS devices Scope: to create new ASIC microchip for signal processing of GPS/Glonass satellite navigation Project Features: IP concept development, high-level C++ modeling, verilog implementation and verification Time To First Fix (TTFF) performance optimization via series-parallel logic buildup and signal processing Complex toolchain to merge two different debuggers Highly configurable matched filter which allows seeking different signals with the different...

Modified: 02.04.2014
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Video Encoding System for Xilinx Platform

Client: a large telecom provider Scope : development of a new digital/analog wireless video- and audio transmission system based on a new coding algorithm tolerant to the loss (distortion) of the fragments of the coded signal, designed to use with special equipment. Tasks: To develop a compression and en/decoding algorithm, consistent with the noise immunity requirements and the channel capacity, taking into account the limitations of the computational capacity of the microcontroller performing...

Modified: 02.04.2014
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